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I've looked at some early calculators and they are a whole different world of weirdness. They used decimal arithmetic (BCD) because it's a lot easier than converting between binary and decimal. The first calculators were serial, with a 1-bit adder and shift registers and bits constantly in motion. The Sinclair Scientific calculator used TI's strange 4-bit architecture along with terrible algorithms.

The Cray-1 (1976) was probably the first 64-bit CPU.

https://en.wikipedia.org/wiki/64-bit_computing#64-bit_data_t... names Stretch from 01961 as the first natively 64-bit CPU, but maybe there are some that are even older?

I forgot about the IBM 7030 Stretch (1961), which was also 64 bits. The NORC (Naval Ordnance Research Calculator) (1954) had 16 decimal digits, which is sort of 64 bits.

Author here for your 8087 questions...

That's a really vertical microcode. It looks more like a specialized assembly than microcode. I guess it makes sense, since the algorithms are so complex and executing one microinstruction per cycle (is that correct?) already provides almost an order of magnitude performance improvement.

Yes, it's one microinstruction per cycle, except there is a 1-cycle delay for branches, adds, and shifts. And some micro-instructions loop, so they can take a bunch of cycles.

Great work! I love to read your articles.

I'm curious to know - you say Intel's 8087 emulation code was a bit of a lump at 16KB, do you know if it emulated the 8087 microcode state machine or did it use a different strategy?


I think the emulation code was a rewrite in 8086 assembly language. An 8087 microcode emulator would be slow and difficult. One of the Opcode Collective people is looking at the emulator now, so there may be more details later. Intel claimed that the emulator completely and exactly duplicated the 8087 functionality, so it would be interesting to see if it is 100% accurate or if they missed any corner cases.

no questions, just thanks

It would be nice if someone used AI and/or Lean to sort out the abc conjecture, an important unsolved problem in Diophantine analysis. A mathematician (Mochizuki) claimed to have proven it in 2012 using a new theory called "Inter-universal Teichmüller theory" that almost nobody understands. Some mathematicians think the proof is correct while the majority don't. So the conjecture is in this annoying limbo where its status is a social construct rather than a decided fact.

https://en.wikipedia.org/wiki/Abc_conjecture


> It would be nice if someone used AI and/or Lean to sort out the abc conjecture, an important unsolved problem in Diophantine analysis.

People did attempt this:

https://github.com/katobungen/LANA_report_202607/blob/pdf/LA...

See also https://www.math.columbia.edu/~woit/wordpress/?p=15770

Here are Kirti Joshi's comments about the LANA project report: https://bpb-us-e2.wpmucdn.com/sites.arizona.edu/dist/4/404/f...


I'm sure over the next 6 months both OpenAI and Anthropic are going to continue pouring many many millions of dollars into any famous open mathematical problem like that. There is a limited pool of problems which have held prestige for enough time to make general news headlines when solved and you don't really get nearly as much limelight for proving it the second time or adding in proof for additional cases/forms.

That's true of the entirety of mathematics. Its validity is a social construct. That is not to relativize it entirely, but much of what was considered good and sound mathematics in the ancient Agean for example would now fall way short of what mathematicians consider valid proofs.

Mathematics is a human endeavor funded on communicating and sharing mental constructs. Some are useful but most of it is not about producing useful things, quite the opposite in fact.

Gödel showed you need to agree on definitions to even do any valid mathematical construct.

Truth is also ill defined. That's what I don't get about generating math with LLMs. Who cares if you make hundreds of pages and lean code and it gets a thumbs up for logical validity? Mathematics is so much more then concatenating valid logical statements.


There's a large difference between "wrong for the given definitions" and "right in that context, but wrong for other definitions" though.

I think I am make a much more basic point than what you're talking about but then again I am not sure what you're tying to say here...

The problem with the acceptance of the given proof of the abc conjecture is rooted in beliefs the proof had at least one erroneous step in its logic which leaves gaps not able to be filled back in without significant new work in the proof. It's not rooted in a difference of starting axioms, what Gödel wrote about, or what kind of truth there can be (though the foreignness has certainly never sped its review up). Your comment may have separate points to make about those things in general but it does not make the problem with the proposed proof the same as the issues which apply to all of mathematics.

Yeah I'm not talking about that one proof, I'm talking about the whole of mathematics. It's not manufacturing theorems, it's an ongoing conversation. It's poetry in the etymological sense, poesis, it's creative. Why would anyone think that manufacturing mathematics is a good idea?

“Good, he did not have enough imagination to become a mathematician.

[Upon hearing that one of his students had dropped out to study poetry]” ― David Hilbert


"We've pointed LLM 7.0 into verifying the Inter-universal Teichmüller theory, spent 100M$ in tokens and generated a 20k line Lean and a 100k line js repo, the result is that the theory is... proven! Hopefully that solves the issue (rather than recreating it with even more complexity)

Curiously, Eswatini (formerly Swaziland) is capitalized eSwatini, as if it is an e-commerce site.

In siSwati it is known as eSwatini

Curious fact: France's longest border is with Brazil.

Most horrifying is a 2014 Science paper on Ebola with 58 authors, 5 of whom died of Ebola before publication. https://www.science.org/content/article/ebolas-heavy-toll-st...

The argument that the Z3 is universal "was an impressive party trick, but diverged entirely from the way the machine was designed, how it was actually used, or indeed from anything that would have made sense in the 1940s."

Source: ENIAC in Action p255.


> Nevertheless, the Z3 was Turing-complete – how to implement a universal Turing machine on the Z3 was shown in 1998 by Raúl Rojas.

https://en.wikipedia.org/wiki/Z3_(computer)


The Z3 lacked conditional branching. The hack to make it technically a universal Turing machine is to execute all possible branches of a program and discard the undesired branch results, so the end result is the same as if it had genuine branching abilities. But of course that'd drastically drive up the computation time if you actually tried to use the machine in that way.

One of the things about Turing-completeness is that it is very easy to become accidentally Turing-complete, since the conditions you need for completeness are very weak. (Famously, C++ template instantiation is unintentionally Turing-complete).

Z3 is an example of an accidentally Turing-complete machine.


With the important exception of "infinite tape". That always gets forgotten.

> Z3 is an example of an accidentally Turing-complete machine.

Kind of easy to let that pass though, given the "imitation game" wasn't even introduced by Turing until way after the Z3 machine was completed.


The imitation game (aka Turing test) has nothing to do with Turing completeness.

Yes, even Rojas says, "From a practical perspective, and in the way the Z3 was really programmed, it was not equivalent to modern computers." https://www.researchgate.net/publication/3330654_How_to_make...

Who said it has to be equivalent to modern computers?

The main reason was the "inhibit recovery problem". The inhibit line required a large current that went through all the cores. This caused electrical noise, requiring a delay while the noise settled down. Doing away with the inhibit line thus helped performance. The drive lines are also shorter, which also helps performance.

The paper "2 1/2 D High Speed Memory Systems: Past, Present, and Future" explains this, but not entirely clearly: https://ieeexplore.ieee.org/document/4038821


Author here for all your core memory questions...

Please write an article about that French computer Project idea: find 64kb kb of such memory and connect it somehow into Apple2, atari and other 8bit cpus hehe

It must be possible to have some hardware adapter to map RAM into that type of memory.

Or even over serial...

ps. Related story: around 10 years ago Texas Instruments started to use FRAM in some of their 16 bit MCUs (msp430 family)

It works exactly like core memory - data still intact after power resets.



FRAM is a somewhat common retrofit for battery-backed SRAM: https://bastelblog.runlevel3.de/en/restore/ds1250-fram-repla...

No special provisions for rad hardening needed?

Core memory is very resistant to radiation. When the Shuttle computers were upgraded to semiconductor memory, radiation became an issue. The solution was to add six extra bits of storage to each word and use ECC. A background process scanned for errors and corrected them. The computer could encounter 100 bit flips per flight, so radiation was significant. (There was even an incident where a single cosmic ray flipped 14 bits.) The other problem with semiconductor memory was its volatility, so the computer had NiCd batteries for backup power to the RAM.

For details on how radiation affected the Space Shuttle's computers, see this paper: https://klabs.org/DEI/Processor/shuttle/oneill_94.pdf


On the topic of ferromagnetic computing, was there ever any serious investigation of Parametron type machines for at least parts of the flight control or other critical systems where interruptions would have been very serious?

I assume you're interested in magnetic core logic computers in general, not specifically Parametrons. In the late 1950s, NASA considered core-transistor logic for a spacecraft navigation computer due to its lower power consumption. The prototype version of the Apollo Guidance Computer (1962) used core-transistor logic. But improvements in transistors made core-transistor logic less appealing, not to mention the arrival of ICs. At the end of 1962, NASA decided to use ICs for the Apollo Guidance Computer and abandoned core-transistor logic. The updated AGC kept the core memory and core rope ROM of the earlier AGC, though.

Yes, those engineering discussions must have been interesting. By that point people had a fair amount of experience in Earth orbit but between the relative newness of space and the relative newness of computers there must have been significant new engineering. Maybe the ICBM programs had some lessons.

The Polaris ballistic missile computer, developed at the MIT Instrumentation Laboratory, was the predecessor to the Apollo Guidance Computer. It used germanium transistors along with magnetic core shift registers for memory. The Polaris computer used discrete three-input NOR gates, while the AGC used three-input NOR gates on integrated circuits. The book "Journey to the Moon" by Eldon Hall, creator of the AGC, has lots of details.

Can I confess I've never quite wrapped my head around the application of the 'inhibit' line in this?

If a write cycle is just a read cycle with a) a reversed polarity and b) you don't care about the contents of the sense line - I don't get why current coincidence is sufficient during the read cycle, but not during the write cycle?

Every description of this I've ever read, sound like inhibit and current coincidence solve the same problem - but have never left me clear on why we need to solve it twice.


The current coincidence is used to select a specific bit / core. Except it selects the same bit in every bank.

Bytes or larger words are made by stacking multiple banks together (18 in the articles case) All 18 bits would be driven in parallel by the driver over the X/Y wires to produce a coherent 18 bit value at the same moment.

The inhibit bit was so you could select which of those 18 bits (in separate banks) would be switched back to a 1, not selecting which bit across the entire bank.


ahh - I see where my dots weren't connecting, then.

I pictured having a current driver on each plane, so the data bits coming in would be enable bits for the current drivers. Which obviously means 18xQty current drivers.

I think you're describing having one big current driver for the whole job, and then data bits drive the inhibits to counter them.

I guess I'm looking through too modern a lens - pumping 18*600mA into the write cycle, plus (up to 18)*600mA into the inhibit, sounds insane to me (hitting 20A for a write) - but I can see that multiplying the current drivers may have sounded nuts in the 50s.


There are different ways of implementing core memory. The "traditional" way uses the inhibit line. The module I examined uses a "2½D" approach, which is what you originally pictured: separate current drivers for each bit and no inhibit line.

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